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TDA8205
NICAM QPSK DEMODULATOR
. . . . . . . . .
HIGHLY INTEGRATED TWO CHIP SOLUTION FOR NICAM DEMODULATION (using TDA8204 decoder) AUTOMATIC DUAL STANDARD DEMODULATION 6.552MHz FOR I SYSTEM 5.85MHz FOR B/G SYSTEM 40dB RANGE AGC SINGLE CRYSTAL OPERATION NICAM 728 DATA AND CLOCK RECOVERY LOW PASS FILTER FOR PWM CODED AUDIO SIGNALS AND J-17 DE-EMPHASIS AUTOMATIC FM MONO SELECTION BY RESERVE SOUND SWITCH FUNCTION VERSATILE AUDIO SWITCHING MATRIX AUTOMATIC MUTE FUNCTION
SHRINK 42 (Plastic Package) ORDER CODE : TDA8205
PIN CONNECTIONS
GND XC1 XC2 DF2 DF1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
LF1 LF2 XK1
VCC
EAIR EAIL SAIR SAIL MAI CAP AMOR AMOL DC2 DC1 AOR AOL GND MMO TEST NDO CK728
8205-01.EPS
BG IN
I IN
AGC
V CC V DD
LFIL1
DESCRIPTION The TDA8205 is essentially divided into two signal processing sections. The first section handles all the NICAM signal acquisition, the QPSK demodulator and clock and data recovery circuits. The key point to note about this section is the dual frequency synthesiser. By use of only one quartz crystal, the IC is able to demodulate QPSK signals from either system I or system B/G in an automatic way. The second section of the TDA8205 manages the analog parts of the twin digital-to-analog converters (DACs) and all filtering and audio switching downstream of the DACs. A simple serial bus from the TDA8204 allows control of the switch functions by the CTV system microcontroller.
October 1993
RG
GND
RFIL1 RESET
VDD
SERI DACDL DACDR GND CK11648
1/8
TDA8205
PIN ASSIGMENT
Pin No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Pin Name GND XC1 XC2 DF2 DF1 BGIN IIN AGC VCC VDD LFIL1 RG GND RFIL1 RESET VDD SERI DACDL DACDR GND CK11648 Function Ground Optional Crystal Optional Crystal Data Filter 2 (eye monitor) Data Filter 1 (eye monitor) System B/G Input System I Input AGC Filter Capacitor +12V Supply +5V Supply Left Filter 1 (J-17 De-emphasis) Gain Setting Resistor for DAC Ground Right Filter 1 (J-17 De-emphasis) Reset Chip +5V Supply Interchip Serial Bus Input DAC Data Left Input DAC Data Right Input Ground 11.648MHz Clock Output Pin No 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 Pin Name CK728 NDO TEST MMO GND AOL AOR DC1 DC2 AMOL AMOR CAP MAI SAIL SAIR EAIL EAIR VCC XK1 LF2 LF1 Function 728kHz Clock Intput NICAM Data Output To be connected to GND Matrix Mute Out Ground Audio Output Left Audio Output Right Decoupling 1 Decoupling 2 Audio Mutable Output Left Audio Mutable Output Right Decoupling Capacitor Mono Audio Input Stereo Audio Input Left Stereo Audio Input Right External Audio Input Left External Audio Input Right +12V Supply 11.648MHz Crystal Loop Filter 2 Loop Filter 1
BLOCK DIAGRAM
CK11648 DACDR DACDL CK728 AMOR AMOL LFIL1 EAIR SAIR NDO SAIL EAIL AGC DF1 DF2
VDD
VDD
9 10 16 39
8
5
4
42
41
23
22 21 19 18
11
34 35 36
MAI
LF1
LF2
VCC
VCC
31
32
37
38
MUTE
IIN 7
SWITCH
AGC
QSPSK DEMOD
CLOCK & DATA RECOVERY
DAC
LPF
27 AOL
SWITCH
BG IN 6
MATRIX SWITCH
28 AOR 29 DC1 30 DC2 O 25 MM
DAC
LPF
TEST 24
DUAL FREQ SYNTHESISER
RESET 15
SERIAL INTERFACE
1
13
20
26
2
3
40
12
14
33
17
GND GND GND
GND
XC1 XC2 XK1
RG
RFIL1
CAP
SERI
BLOCK DIAGRAM DESCRIPTION The QPSK signal enters the IC via two inputs after passing through two external bandpass filters at the relevant frequencies of 6.552MHz and 5.85MHz for system I and B/G respectively. The two inputs enter a source selection switch and pass immediately to an AGC block which has a total range of 40dB. The resulting levelled signal passes
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to the QPSK demodulator which recovers the NICAM 728Kb/s data stream by means of carrier and clock recovery circuits. Carrier recovery is achieved with a baseband remodulator which consists of a phase locked loop with a switchable phase detector. This allows it to lock to one of four possible phases of the QPSK
8205-02.EPS
TDA8205
8205-01.TBL
TDA8205
carrier without disruption due to the modulation. Dual frequency operation is made possible by synthesising the carrier reference frequency thus saving the need for two extra crystals. Dual VCXO can also be software selected (SYN bit of CR3 in TDA8204) with external crystal (Pin XC1/XC2) for new standards. Selection between XC1 and XC2 is done with bit "IBG" in CR3 register of TDA8204 (IBG = 0 XC1 selected, IBG = 1 XC2 selected). The standards switch controls operation of the QSPK demodulator at either 6.552MHz or 5.85MHz. This can be controlled via the I2C bus or the decoder set into automatic mode in which it determines the standard by alternately trying to lock to the two systems. On chip low pass filters recover the in-phase and quadrature data channels which are then sliced by comparators. The symbol clock is recovered from this data and used to sample and re-time it. The two data channels are then decoded and serialized to obtain the NICAM-728 data which is then passed on to the NICAM decoder in the TDA8204. After processing the NICAM into a digital bit-stream in the TDA8204, the data is passed back to the TDA8205 for the analog functions of the DACs to be performed. Conversion of the pulse width modulated bit streams to analog takes place and is followed by low pass filtering which removes high frequency quantising noise and performs J-17 de-emphasis. The DACs signal level can be adjusted to match the reserve sound signal level. 1VRMS maximum on Pins LFIL1/RFIL1 can be obtained by selection of appropriate resistor on Pin RG. Once the analog audio has been recovered, certain source switch functions are performed. If the NICAM signal fails and if the reserve sound flag (C4), of SRO register, is set the reserve sound switch ABSOLUTE MAXIMUM RATINGS
Symbol VCC VDD Ptot Toper Tstg Parameter Supply Voltage Supply Voltage Total Power Dissipation Operating Temperature Range Storage Temperature Range Value 15 7 1.2 0, + 70 -20, + 150 Unit V V W o C o C
automatically selects Mono Audio Input. If the reserve sound flag (C4) is reset, the reserve sound switch will not change and the audio outputs will be muted (DAC outputs muted). If the NICAM signal only carries data, Mono Audio Input is selected. The reserve sound switch can be forced to select Mono Audio Input via I2C bus, using Bit FS0 = 1 and FS1 =0 of CR3 Register. This can be used in the case of NICAM marginal reception. To select Stereo Left and Right Audio Input Bit FS0 = 0 and FS1 = 1 of CR3 Register must be selected. The outputs from this reserve sound switch are available on Audio mutable output left and right, and are internaly connected to the audio matrix. A simple audio switching matrix is provided internally for flexible control over the audio source and destination selection. Audio signal left and right coming from the reserve sound switch and the external audio input left and right can be switched to the audio outputs left and right . DAC and auxiliary audio outputs can be muted. An additional +6dB gain can be applied to raise the output levels to 2VRMS maximum. For more informat ion see Sof t wa re Specification chapter (III.5.3/TDA8204). The DAC outputs are automatically muted under the following conditions - loss of frame alignement - the bit error rate (Ber) is > error rate limit - NICAM signal is conveying M1 only. The right DAC is muted unless M1 has been selected to be on both DAC outputs. - NICAM signal is conveying data only. For test purposes, the DAC outputs can be unmuted by forcing the bi-directional mute Pin 25 of TDA8204 or via I2C bus.
Symbol Rth (j-a)
Parameter Thermal Resistance Junction-Ambient
Max.
Value 67
o
Unit C/W
3/8
8205-03.TBL
THERMAL DATA
8205-02.TBL
TDA8205
ELECTRICAL CHARACTERISTICS (Tamb = 25oC, VCC = 12V, VDD = 5V, unless otherwise specified)
Symbol SUPPLY VCC VDD ICC IDD Supply Voltage Range Supply Voltage Range Supply Current Supply Current 11.4 4.75 18 10 12 5 36 18 12.6 5.25 50 42 V V mA mA Parameter Min. Typ. Max. Unit
DIGITAL PINS OUTPUTS CK11, NDO VOL VOH VOL ILK INPUTS SERI, DACDL, DACDR, CK728 VIL VIH ILK Low Level Input Voltage High Level Input Voltage Input Leakage Current 0.6 VDD 2 0.8 V V A Low Level Output Voltage (I = -4mA) HIgh Level Output Voltage (I = 4mA) MMO (open collector) Low Level Output Voltage (I = -1mA) High Level Output Current (leakage) 0.4 2 V A 0.7 VDD 0.4 V V
ANALOG PINS I-B/G SELECTOR VDC RIN CIN AGC VIN AGClv AGChv AGCta AGCtd VDC Kd kv VDC ROUT VOUT VDC Kd kv Input Voltage Range AGC Low Voltage (VIN = 1VPP) AGC High Voltage (VIN = 10mVPP) AGC Attack Time (VIN = 10mV to 1V, CAGC = 100nF) AGC Decay Time (VIN = 1V to 10mV, CAGC = 100nF) DC Bias Voltage (SYN = 1) Phase Detector Constant (no mod.) VCO Constant DC Bias Voltage Output Resistance Output Voltage (System I) DC Bias Voltage Phase Detector Constant (all 1's) VCXO Constant 1 10 200 2 11 15 220 5 33 3.5 2.5 1.2 0.6 2.5 7 4.4 10 1000 mVPP VPP V ms ms V A/rad MHz/V V k VPP V A/rad kHz/V DC Bias Voltage Input Resistance Input Capacitance 2.8 10 10 V k pF
QPSK DEMODULATOR (LF1)
EYE DIAGRAM MONITORS (DF1, DF2)
CLOCK AND DATA RECOVERY (LF2)
8205-04.TBL
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TDA8205
ELECTRICAL CHARACTERISTICS (continued)
Symbol DAC AND FILTER (LFIL1, RFIL1) VDC IOUT VRG DC Bias Voltage Output Current (RG = 5.6k, DAC full scale) RG Pin DC Voltage DAC SELECTED VOUT S/N THD Chm S/N THD Output Voltage (1kHz at -11.75dB, J17 de-emphasis, RG = 5.6k) Relative to 0.5VRMS, noise measured with IEC-179 A-filter 1kHz at 0.5VRMS, RG = 5.6k Crosstalk at 1kHz, 0.5VRMS Maximum Channel Matching Error MONO OR STEREO AUDIO INPUT SELECTED (MAI, SAIL, SAIR) Relative to 0.5VRMS, noise measured with IEC-179 A-filter 1kHz at 0.5VRMS STEREO AUDIO INPUT SELECTED Crosstalk at 1kHz, 0.5VRMS Chm Maximum Channel Matching Error 75 2 dB dB
8205-05.TBL
Parameter
Min.
Typ. 2.5 340 1.25
Max.
Unit V APP V
AUDIO MATRIX (AOL, AOR, AMOL, AMOR) 0.39 60 0.5 70 0.05 65 2 88 0.02 0.2 0.63 VRMS dB % dB dB dB %
5/8
C9 120pF
R8 150
C7 680pF
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15 16
17
18 19
20 21
R19 270
R11 5.6k
R1 8.2k C17 100nF C4 1nF MON1 MON2 R12 5.6k C14 6.8nF R20 22k L2 10H C23 10F
DD
R4 470 C18 100nF C16 10F R16 1M
C3 10nF
F1 6.552MHz
C13 100nF
FM mono (forced)
single mono
Q1 C15 6.8nF
TRAP
R3 1.2k
R5 100
R6 33
C5 220pF C6 220pF
L1 10H
stereo
T1
6.0MHz C26 220F
C22 10F
VCC
V
Q1, Q2 : BC109 or BC550C F1 : TOKO TH316BQM2110QDAF (5VFP) T1 : Matsushita EFCS6R0MWS X1 : 11.648MHz Crystal NDK
Unmute DAC (forced)
8205-03.EPS
LED4
NICAM SYS. I IN R7 470 R13 43k R14 43k R15 5.6k
10nF
C2 10nF
dual mono
LED3
C1
R2 470
BFP
LED2
6/8
FM MONO IN R L Language Selection C19 100nF C25 1F LK1 R17 330 LED1 mute C24 1F C20 10F C21 10F LK2 AUDIO OUTPUT ERROR MONITOR 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
TDA8205
* C12 value depends on X1
C12 18pF*
X1
C11 150pF
11.648MHz
R10 39k
C10 6.8nF
C7
R9 8.2M
C8
APPLICATION DIAGRAMS Figure 1 : Stand Alone Application (I standard)
100nF
220nF
IC1
TDA8205
IC2
TDA8204
1
2
3
4
5
6
7
8
9
10
11
12 13 14
15 16 17
18
19
20
21
R18 10k Q2
C28 100nF
EXTERNAL AUDIO IN Right C11 100nF C12 100nF C13 100nF C14 10F C15 10F C16 1F C17 1F C18 10F C19 10F Left FM MONO IN Right Left Right Left
STEREO AUDIO IN
AUDIO MUTABLE OUT
AUDIO OUTPUT
* C23 value depends on X1
Right
Left
CK728 TEST SEL0
SEL1 DV
ADV
PDV FID
LED1 mute R25 330 ERROR MONITOR
C23 18pF *
X1
C22 150pF
11.648MHz
R1 39k VDD 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
C21 6.8nF
VCC
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
R27 8.2M
C25 220nF
C26 120pF
R2 150
R32 270
IC1
TDA8205
IC2
TDA8204
MUTE
C9 100nF VDD
C10 100nF
VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
C45 680pF
R31 10k Q3 C39 100nF C42 100nF C43 100nF R19 5.6k R21 43k C20 10F C41 6.8nF C40 6.8nF R20 43k R22 5.6k R24 1M C37 1nF VDD R17 470
Figure 2 : I2C Bus Controlled Application (I and B/G standard)
R6 8.2k
R5 470
C32 10nF
F1 5.85MHz
R23 5.6k
LED2 single mono LED3 dual mono LED4 stereo SDA SCL
C31
BFP
R7 470
Q1
NICAM SYS. BG IN
10nF
C33 10nF
TRAP
C44 220F R33 22k +12V C38 1nF C1 10F C2 100nF C3 100nF
R8 1.2k
R9 100
R10 33
I 2 C BUS
T1
C4
C3
C2 SD US1 US0 RSW GND
VCC USER BITS C4 100nF I 2 S BUS CONTROL BITS VDD C8 100nF Q1, Q2, Q3 : BC109 or BC550C F1 : TOKO TH316 BQM 2080 QDAF (5VFP) F2 : TOKO TH316 BQM 2110 QDAF (5VFP) T1 : Matsushita EFCS5R5MWS T2 : Matsushita EFCS6R0MWS X1 / 11.648MHz Crystal NDK
R12 8.2k
R11 470
C35 10nF
F2 6.552MHz
BFP R18 470 MON1 MON2 +5V C5 10F C6 100nF C7 100nF
C34
R13 470
NICAM SYS. I IN
Q2
10nF
C36 10nF
R14 1.2k C30 220pF C29 220pF
R15 100
R16 33
T2
6.0MHz
SCK
WS
C1
5.5MHz
TRAP
TDA8205
7/8
8205-04.EPS
TDA8205
PACKAGE MECHANICAL DATA 42 PINS - PLASTIC SHRINK
e4 F
a1 A I
b2
b e
e
Stand-off
L
b1
E
D
42
22
1
21
Dimensions A a1 b b1 b2 b3 D E e e3 e4 F i L
Min. 3.30
Millimeters Typ. 0.51 0.35 0.20 0.75 0.75 15.57
Max.
Min. 0.130
Inches Typ. 0.020 0.014 0.008 0.030 0.030 0.613
Max.
0.59 0.36 1.42 39.12 17.35 0.070 1.400 0.600
0.023 0.014 0.056 1.540 0.683
1.778 35.56 15.24 14.48 5.08 2.54
0.100
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
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SDIP42.TBL
0.570 0.200
PMSDIP42.EPS

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